DocumentCode :
3105782
Title :
Simulation and analysis of quantum capacitance in single-gate MOSFET, double-gate MOSFET and CNTFET devices for nanometre regime
Author :
Sinha, Sujeet Kumar ; Chaudhury, Santanu
Author_Institution :
Dept. of Electr. Eng., Nat. Inst. of Ttechnology, Silchar, India
fYear :
2012
fDate :
28-29 Dec. 2012
Firstpage :
157
Lastpage :
160
Abstract :
Carbon nanotube based FET devices are getting more and more importance today because of their high channel mobility and improved gate capacitance versus voltage characteristics. In this paper we compare and analyse the effect of gate capacitance on varying oxide thickness for single gate MOSFET, double gate MOSFET and CNTFET. It is seen that in nanometre regime quantum capacitance plays the major role in deciding the gate capacitance of a CNTFET and we find a favourable characteristics of decreasing gate capacitance with the decrease in the oxide thickness which is not possible to get in single gate silicon MOSFET and double gate MOSFET.
Keywords :
MOSFET; carbon nanotubes; CNTFET devices; carbon nanotube based FET devices; channel mobility; double-gate MOSFET; gate capacitance; nanometre regime; quantum capacitance analysis; quantum capacitance simulation; single gate silicon MOSFET; single-gate MOSFET; voltage characteristics; CNTFETs; Carbon nanotubes; Logic gates; MOSFET circuits; Quantum capacitance; Silicon; CNTFET; DG-MOSFET; MOSFET; inversion layer capacitance; oxide-thickness; quantum capacitance;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Communications, Devices and Intelligent Systems (CODIS), 2012 International Conference on
Conference_Location :
Kolkata
Print_ISBN :
978-1-4673-4699-3
Type :
conf
DOI :
10.1109/CODIS.2012.6422160
Filename :
6422160
Link To Document :
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