DocumentCode :
3105783
Title :
Automatic parallelization of fine-grained meta-functions on a chip multiprocessor
Author :
Lee, Sanghoon ; Tuck, James
Author_Institution :
Dept. of Electr. & Comput. Eng., North Carolina State Univ., Raleigh, NC, USA
fYear :
2011
fDate :
2-6 April 2011
Firstpage :
130
Lastpage :
140
Abstract :
Due to the importance of reliability and security, prior studies have proposed inlining meta-functions into applications for detecting bugs and security vulnerabilities. However, because these software techniques add frequent, finegrained instrumentation to programs, they often incur large runtime overheads. In this work, we consider an automatic thread extraction technique for removing these fine-grained checks from a main application and scheduling them on helper threads. In this way, we can leverage the resources available on a CMP to reduce the latency and overhead of fine-grained checking codes. Our parallelization strategy automatically extracts meta-functions from the main application and executes them in customized helper threads-threads constructed to mirror relevant fragments of the main program´s behavior in order to keep communication and overhead low. To get good performance, we consider optimizations that reduce communication and balance work among many threads. We evaluate our parallelization strategy on Mudflap, a pointer-use checking tool in GCC. To show the benefits of our technique, we compare it to a manually parallelized version of Mudflap. We run our experiments on an architectural simulator with support for fast queueing operations. On a subset of SPECint 2000, our automatically parallelized code is only 29% slower, on average, than the manually parallelized version on a simulated 8-core system. Furthermore, two applications achieve better speedups using our algorithms than with the manual approach. Also, our approach introduces very little overhead in the main program-it is kept under 100%, which is more than a 5.3× reduction compared to serial Mudflap.
Keywords :
formal verification; microprocessor chips; multi-threading; multiprocessing systems; optimisation; parallel architectures; processor scheduling; program debugging; 8-core system; Mudflap; SPECint 2000; architectural simulator; automatic parallelization; automatic thread extraction technique; bugs; checking codes; chip multiprocessor; fine-grained meta-functions; instrumentation; optimizations; pointer-use checking tool; reliability; scheduling; security vulnerabilities; sofiware techniques; threads; Cloning; Instruction sets; Parallel processing; Runtime; Scalability;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Code Generation and Optimization (CGO), 2011 9th Annual IEEE/ACM International Symposium on
Conference_Location :
Chamonix
Print_ISBN :
978-1-61284-356-8
Electronic_ISBN :
978-1-61284-358-2
Type :
conf
DOI :
10.1109/CGO.2011.5764681
Filename :
5764681
Link To Document :
بازگشت