On the Partial Inclusion Protocol for Multi Level Cache Hierarchy in Disk Controller

The Inclusion protocol is important in reducing the cache coherence complexity for disk controller with multilevel cache hierarchies. We proposed a two kind of partial inclusion protocol called space inclusion and mapping inclusion for fully associative caches and set associative caches which allow different block sizes at different levels of the hierarchy. The disk controller structures with a two-level cache hierarchy are examined. The feasibility of this protocol in this controller is discussed. From the performance measurement results of benchmark test, we can see the performance of the proposed protocol can be 10% better than conventional inclusion protocol