Title :
Testability analysis of hierarchical finite state machines
Author :
Martinolle, F. ; Geffroy, J.C. ; Soulas, B.
Author_Institution :
INSAT-DGE, Toulouse, France
Abstract :
The authors present a hierarchical analysis of interconnected finite state machines helpful for testability evaluation. Formal operators determine the controllable and observable functional parts of the modules of the hierarchy; several kinds of functional redundancies are deduced and their causes are diagnosed. A prototype written in PROLOG validates these concepts
Keywords :
finite automata; graph theory; logic testing; redundancy; PROLOG prototype; finite state machines; functional redundancies; interconnected machines; testability evaluation; Automata; Automatic control; Automatic test pattern generation; Automatic testing; Circuit faults; Circuit testing; Controllability; Density estimation robust algorithm; Observability; Redundancy;
Conference_Titel :
Design Automation. EDAC., Proceedings of the European Conference on
Conference_Location :
Amsterdam
DOI :
10.1109/EDAC.1991.206411
