DocumentCode
3106412
Title
Area and performance optimizations in path-based scheduling
Author
Bergamaschi, Reinaldo A. ; Camposano, Raul ; Payer, Michael
Author_Institution
IBM Res. Div., Thomas J. Watson Res. Center, Yorktown Heights, NY, USA
fYear
1991
fDate
25-28 Feb 1991
Firstpage
304
Lastpage
310
Abstract
The authors describe the area and performance optimizations implemented in the As-Fast-As-Possible (AFAP) scheduling algorithm. The AFAP scheduling algorithm is a path-based technique that finds the minimum number of control steps for all possible sequences of operations in the control-flow graph, under given constraints. Area requirements for functional units, such as their number and type, are translated into constraints which are then met exactly. The number of registers is also minimized. The performance optimizations included in this paper are concerned mainly with the scheduling of loops
Keywords
circuit layout CAD; graph theory; optimisation; AFAP; As-Fast-As-Possible; area optimisation; control-flow graph; path-based scheduling; performance optimizations; register minimisation; Constraint optimization; Hardware; Heuristic algorithms; High level synthesis; Integrated circuit interconnections; Proportional control; Registers; Scheduling algorithm; Signal processing; Strain control;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation. EDAC., Proceedings of the European Conference on
Conference_Location
Amsterdam
Type
conf
DOI
10.1109/EDAC.1991.206413
Filename
206413
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