Built-in-chip testing of voltage overshoots in high-speed SoCs

We present a methodology to detect and measure the signal overshoots occurring on the interconnects of high-speed system-on-chips. Overshoots are known to inject hot-carriers into the gate oxide which cause permanent degradation of MOSFET transistor performance over time. We propose a built-in chip mechanism to detect overshoots, collect the occurrence information and scan them out efficiently and inexpensively for built-in self-test, reliability analysis and diagnosis