Improved efficiency of power amplifier using CPW for K-band applications

This paper presents a novel design approach of CMOS power amplifier (PA) using 50Ω matched coplanar waveguide component which improves the power efficiency for K-band applications. This new technique of designing PA also enhances the data transmission rate and achieves saturated output power in the desired frequency band. A two stage CMOS PA is designed in which coplanar waveguide line is used in order to provide broadband multi-section matching networks which could improve bandwidth, output power, power gain and power added efficiency (PAE). A two-stage CMOS PA design is simulated using predictive technology model (PTM) 65nm CMOS process in ADS.v.12. A simulation result of PA achieves a reflection parameter of -43.06dB at 23GHz with forward gain of 15.6dB over the frequency band of 20.5-24.5GHz. The best achievement of design is to achieve PAE of 58% using the concept of coplanar waveguide.