Title :
Socillator test: a delay test scheme for embedded ICs in the boundary-scan environment
Author :
Tan, Tek Jau ; Lee, Chung Len
Author_Institution :
Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
Abstract :
A novel test scheme, which uses an oscillation source to supply the test signal and a transition detector to detect the arrival of the transition of the test signal through the CUT within the specific delay time, is proposed. The scheme is ideal to test embedded chips in the boundary scan environment within an SOC
Keywords :
VLSI; application specific integrated circuits; automatic testing; boundary scan testing; delays; fault diagnosis; integrated circuit testing; SOC; boundary-scan environment; delay test scheme; embedded ICs; socillator test; specific delay time; test signal; transition detector; Circuit faults; Circuit testing; Delay effects; Detectors; Electronic equipment testing; Integrated circuit testing; Ring oscillators; Robustness; System testing; System-on-a-chip;
Conference_Titel :
VLSI Test Symposium, 19th IEEE Proceedings on. VTS 2001
Conference_Location :
Marina Del Rey, CA
Print_ISBN :
0-7695-1122-8
DOI :
10.1109/VTS.2001.923433
