DocumentCode
3106999
Title
A low-cost adaptive ramp generator for analog BIST applications
Author
Azais, F. ; Bernard, S. ; Bertrand, Y. ; Michel, X. ; Renovell, M.
Author_Institution
LIRMM, Univ. des Sci. et Tech. du Languedoc, Montpellier, France
fYear
2001
fDate
2001
Firstpage
266
Lastpage
271
Abstract
This paper presents a high-quality and area-efficient ramp generator to be used for on-chip testing of analog and mixed-signal circuits. An original adaptive scheme is developed to palliate the inaccuracy of a basic ramp generator. As a result, the proposed adaptive ramp generator exhibits very good performances in terms of slope precision and ramp linearity while maintaining a low area overhead
Keywords
adaptive systems; analogue integrated circuits; built-in self test; integrated circuit testing; mixed analogue-digital integrated circuits; ramp generators; analog BIST applications; analog circuits; area-efficient ramp generator; high-quality ramp generator; low area overhead; low-cost adaptive ramp generator; mixed-signal circuits; onchip testing; ramp linearity; slope precision; Built-in self-test; Capacitors; Circuit faults; Circuit testing; Costs; Integrated circuit testing; Production; Switches; Time domain analysis; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Test Symposium, 19th IEEE Proceedings on. VTS 2001
Conference_Location
Marina Del Rey, CA
Print_ISBN
0-7695-1122-8
Type
conf
DOI
10.1109/VTS.2001.923449
Filename
923449
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