DocumentCode
3107050
Title
Automatic generation of diagnostic March tests
Author
Niggemeyer, Dirk ; Rudnick, Elizabeth M.
Author_Institution
Center for Reliable & High Performance Comput., Illinois Univ., Urbana, IL, USA
fYear
2001
fDate
2001
Firstpage
299
Lastpage
304
Abstract
A new approach to automatically generating diagnostic memory tests of linear order (𝒪(N)) is presented. The resulting March tests provide complete detection and distinguishing of all single-cell and two-cell fault models. The approach is based on state transition graph modelling, decomposition of functional memory faults into basic fault effects, and output tracing. For each of the targeted basic fault effects, all possible March sequences are generated. A fast greedy-based algorithm is then used to compose diagnostic March tests from the set of March sequences. The proposed test generation algorithm was implemented in C. The results show that automatic generation can compete with hand-optimization of diagnostic March tests
Keywords
automatic testing; binary sequences; fault diagnosis; graph theory; integrated circuit testing; integrated memory circuits; March sequences; diagnostic March tests; diagnostic memory tests; functional memory faults; greedy-based algorithm; linear order; output tracing; single-cell fault models; state transition graph modelling; test generation algorithm; two-cell fault models; Automatic testing; Built-in self-test; Circuit faults; Circuit testing; Fault detection; Fault diagnosis; Hardware; Manufacturing automation; System testing; System-on-a-chip;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Test Symposium, 19th IEEE Proceedings on. VTS 2001
Conference_Location
Marina Del Rey, CA
Print_ISBN
0-7695-1122-8
Type
conf
DOI
10.1109/VTS.2001.923453
Filename
923453
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