Abstract :
We discuss the approach to concurrency in Bluespec\´s commercial tools that enable chip designers to deal with complex concurrency, the hallmark of today\´s systems on a chip. We discuss the basic concurrency model (rules, or guarded atomic actions); modular construction of rules; scheduling into clocked synchronous hardware, including multiple clock domains; non-determinism vs. determinism, and predictability and control of scheduling; and suitability for formal verification. We also discuss the importance of "bridging", i.e., the ability to use the same semantic model both for highlevel specifications and modeling as well as for high-quality hardware implementations.
Keywords :
integrated circuit design; system-on-chip; SoC; complex concurrency; composable guarded atomic actions; formal verification; high- level modeling; high- level specifications; high- quality hardware implementations; semantic model; Clocks; Concurrent computing; Context modeling; Hardware; Logic; Modular construction; Power system modeling; Processor scheduling; Registers; System-on-a-chip;
