Periodic signal suppression in a concurrent fault simulator

Clock suppression has been proposed to take advantage of the periodic signals such as the clock present in synchronous designs. In clock suppression, no events due to the clock input are generated, but the information can be reconstructed as needed. In this paper, the authors present periodic signal suppression, which is a generalized form of clock suppression, as a means to suppress predictable events of all periodic signals throughout the circuit. To do this, a special signal state labeled P is introduced. P states indicate that signals are periodic, but cause no unnecessary activity in an event driven simulator. At any time, the original waveform can be reconstructed from the periodic signal. This general implementation allows clock suppression to work on divided or gated clocks and on signals that may alternate periodic and non-periodic behavior in addition to the clock tree. Moreover, concurrent simulation of faults on the suppressed signal wires including the clock tree is possible