Title :
Validity of compact gate C — V model on SiC-SiO2 MOS device
Author :
Chakraborty, Chandan
Author_Institution :
Dept. of Electron. & Telecommun. Eng., Jadavpur Univ., Kolkata, India
Abstract :
The compact gate capacitance-voltage (C-V) model is utilized to verify the experimentally obtained C-V curves for n-type SiC-SiO2 MOS devices. The model is well in agreement with the experimental data. The dependence of capacitance on oxide thickness and flatband voltage are also investigated.
Keywords :
MIS devices; capacitance; semiconductor device models; silicon compounds; wide band gap semiconductors; MOS device; SIC-SiO2; compact gate capacitance-voltage model; flatband voltage; oxide thickness; Capacitance; Capacitance-voltage characteristics; Logic gates; MOS devices; Silicon; Silicon carbide; Substrates; MOS device; SiC-SiO2 device; flatband voltage;
Conference_Titel :
Communications, Devices and Intelligent Systems (CODIS), 2012 International Conference on
Conference_Location :
Kolkata
Print_ISBN :
978-1-4673-4699-3
DOI :
10.1109/CODIS.2012.6422238
