Study for safe operating area of high voltage LDMOS

Author

Jian, Fang ; Zhaoji, Li ; Bo, Zhang

Author_Institution

Univ. of Electron. Sci. & Technol. of China, Chengdu, China

fYear

2004

fDate

Apr 27-30, 2004

Firstpage

15

Lastpage

18

Abstract

An analytical on-state breakdown model for high voltage RESURF LDMOS has been proposed in this paper. The model considers the drift velocity saturation of carriers and influence of the parasitic bipolar transistor. As a result, the electric field profile of n-drift in LDMOS, in the on-state, can be obtained. Based on this model, the safe operating area (SOA) of LDMOS can be calculated. The analytical results partially fit with our numerical (by MEDICI) and experiment results. This model is an accurate aid in understanding the device physics during the on-state, and it also directs high voltage LDMOS design.

Keywords

power MOSFET; semiconductor device breakdown; semiconductor device models; LDMOS safe operating area; RESURF LDMOS; SOA; carrier drift velocity saturation; high voltage LDMOS; n-drift electric field profile; on-state breakdown model; on-state device physics; parasitic bipolar transistor; Analytical models; Bipolar transistors; Breakdown voltage; CMOS logic circuits; Electron mobility; Electronic mail; Impact ionization; Physics; Semiconductor device modeling; Semiconductor optical amplifiers;

fLanguage

English

Publisher

ieee

Conference_Titel

Business of Electronic Product Reliability and Liability, 2004 International Conference on

Print_ISBN

0-7803-8361-3

Type

conf

DOI

10.1109/BEPRL.2004.1308143

Filename

1308143