Title :
Design of various logic gates in neural networks
Author :
Yellamraju, Suryateja ; Kumari, Smriti ; Girolkar, Suraj ; Chourasia, Surabhi ; Tete, Aruna D.
Author_Institution :
Dept. of Electron. Eng., G.H. Raisoni Coll. of Eng., Nagpur, India
Abstract :
This work presents a CMOS technique for designing and implementing a biologically inspired neuron which will accept multiple synaptic inputs. The circuit accepts synapses as inputs and generates a pulse width modulated output waveform of constant frequency depending on the level of activation. Next, the behavior of this implementation has been presented, and the realization of various basic logic gates through this combination has been realized.
Keywords :
CMOS logic circuits; logic design; logic gates; neural chips; CMOS technique; activation level; biologically inspired neuron; circuit synapses; logic gates design; neural networks; pulse width modulated output waveform; synaptic inputs; Biological neural networks; Electric potential; Integrated circuit modeling; Logic gates; MOSFET; Neurons; integrated circuit; level of activation; logic gates; neural; neuron; post synaptic potential; schmitt trigger; synapse;
Conference_Titel :
India Conference (INDICON), 2013 Annual IEEE
Conference_Location :
Mumbai
Print_ISBN :
978-1-4799-2274-1
DOI :
10.1109/INDCON.2013.6725879
