DocumentCode :
3108688
Title :
An algorithm for accelerating GHM Multiwavelet transformation on FPGA
Author :
Pavu, Kiran Susan ; Thomas, Vinu
Author_Institution :
Dept. of Electron. & Commun., Rajagiri Sch. of Eng. & Technol., Kochi, India
fYear :
2012
fDate :
18-20 July 2012
Firstpage :
123
Lastpage :
127
Abstract :
Multiwavelets offer the possibility of superior performance for signal processing applications, compared with scalar wavelets. A multiwavelet system can simultaneously provide perfect reconstruction while preserving length, good performance at the boundaries, and a high order of approximation. The GHM Multiwavelet system is one of the most common multiwavelet systems with two pairs of scaling and wavelet functions. Hardware Acceleration of computation-intensive systems like GHM Multiwavelet will speed up such complicated routines. The ability to parallelize algorithms also makes the hardware accelerator more preferable. In this paper an attempt is made at obtaining a GHM Multiwavelet filter bank Hardware Accelerator for processing 1-Dimensional signals on FPGA.
Keywords :
channel bank filters; field programmable gate arrays; signal reconstruction; wavelet transforms; 1-dimensional signals; FPGA; GHM multiwavelet filter bank hardware accelerator; GHM multiwavelet transformation; algorithm parallelization; computation-intensive systems; perfect reconstruction; scalar wavelets; scaling functions; signal processing applications; wavelet functions; Arrays; Digital signal processing; Equations; Field programmable gate arrays; Filter banks; Hardware; Multiresolution analysis; Device Utilization; FPGA Design; GHM Multiwavelet; Hardware Accelerator; Synthesis Report; VHDL; Virtex4;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Data Science & Engineering (ICDSE), 2012 International Conference on
Conference_Location :
Cochin, Kerala
Print_ISBN :
978-1-4673-2148-8
Type :
conf
DOI :
10.1109/ICDSE.2012.6282308
Filename :
6282308
Link To Document :
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