Title :
Approximate reachability analysis of timed automata
Author_Institution :
Cadence Berkeley Lab., CA, USA
Abstract :
A promising approach to formal verification of real-time systems is to use timed automata to model systems, and then to check whether certain “unsafe” states are reachable. Although theoretically appealing, this approach has significant practical problems because it requires expensive computation of reachable states. Fortunately computing a superset of reachable states is sometimes much cheaper. Replacing the set of reachable states with its superset is a conservative approximation, in the sense that it can occasionally cause a correct system to be declared incorrect, but can never cause an incorrect system to be declared correct. We propose two algorithms for computing a superset of reachable states of a timed automaton. Both algorithms involve only manipulation of Boolean functions, which are used to represent both sets of discrete state components and timing information. The algorithms offer different trade-offs between accuracy of approximation and efficiency of computation. Initial experimental results show that they are competitive with the best published results, but that further improvements are necessary to scale up to realistic systems
Keywords :
Boolean functions; diagrams; finite automata; program verification; reachability analysis; real-time systems; Boolean functions; approximate reachability analysis; computation; discrete state components; finite state automata; formal verification; incorrect system; real-time systems; timed automata; timing information; unsafe states; Approximation algorithms; Automata; Automatic control; Boolean functions; Data structures; Laboratories; Reachability analysis; Real time systems; State-space methods; Timing;
Conference_Titel :
Real-Time Systems Symposium, 1996., 17th IEEE
Conference_Location :
Los Alamitos, CA
Print_ISBN :
0-8186-7689-2
DOI :
10.1109/REAL.1996.563700