DocumentCode :
3109401
Title :
Device and process optimization for a low voltage enhancement mode power heterojunction FET for portable applications
Author :
Huang, J.H. ; Glass, E. ; Abrokwah, J. ; Bernhardt, B. ; Majerus, M. ; Spears, E. ; Parsey, J.M., Jr. ; Scheitlin, D. ; Droopad, R. ; Mills, L.A. ; Hawthorne, K. ; Blaugh, J.
Author_Institution :
Phoenix Corp. Res. Labs., Motorola Inc., Tempe, AZ, USA
fYear :
1997
fDate :
12-15 Oct. 1997
Firstpage :
55
Lastpage :
58
Abstract :
This paper describes a true enhancement mode RF power device with state-of-the-art performance operated at 3.5 Volts at 900 MHz. The performance was realized with a technology derived from the digital CGaAs/sup TM/ technology. The necessary device and process optimizations to adapt the digital technology for RF applications are discussed and results presented.
Keywords :
III-V semiconductors; UHF field effect transistors; gallium arsenide; junction gate field effect transistors; land mobile radio; power field effect transistors; semiconductor technology; 3.5 V; 900 MHz; GaAs; device optimization; digital CGaAs technology; low voltage enhancement mode RF power heterojunction FET; portable application; process optimization; Contact resistance; FETs; Heterojunctions; Low voltage; MESFETs; Passivation; Plasma applications; Plasma devices; Plasma properties; Radio frequency;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Gallium Arsenide Integrated Circuit (GaAs IC) Symposium, 1997. Technical Digest 1997., 19th Annual
Conference_Location :
Anaheim, CA, USA
ISSN :
1064-7775
Print_ISBN :
0-7803-4083-3
Type :
conf
DOI :
10.1109/GAAS.1997.628236
Filename :
628236
Link To Document :
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