VLSI implementation of a reconfigurable cellular neural network containing local logic (CNNL)

Author

Halonen, K. ; Porra, V. ; Roska, T. ; Chua, L.

Author_Institution

Dept. of Electr. Eng., Helsinki Univ. of Technol., Espoo, Finland

fYear

1990

fDate

16-19 Dec 1990

Firstpage

206

Lastpage

215

Abstract

A new integrated circuit cellular neural network implementation having digitally or continuously selectable template coefficients is presented. Local logic and memory is added into each cell providing a simple dual computing structure (analog and digital). The variable-gain operational transconductance amplifier (OTA) is used as voltage controlled current sources to program the weighting factors of the template elements. A 4-by-4 CNN circuit is realized using the 2 μm analog CMOS-process. The circuit with different template configurations has been simulated with HSPIC

Keywords

CAD; CMOS integrated circuits; VLSI; cellular arrays; hybrid computers; neural nets; parallel architectures; 2 micron; CMOS IC; HSPIC; VLSI; local logic; operational transconductance amplifier; reconfigurable cellular neural network; template coefficients; voltage controlled current sources; weighting factors; Analog computers; Cellular neural networks; Circuit simulation; Computational modeling; Digital integrated circuits; Operational amplifiers; Reconfigurable logic; Transconductance; Very large scale integration; Voltage control;

fLanguage

English

Publisher

ieee

Conference_Titel

Cellular Neural Networks and their Applications, 1990. CNNA-90 Proceedings., 1990 IEEE International Workshop on

Conference_Location

Budapest

Type

conf

DOI

10.1109/CNNA.1990.207526

Filename

207526