Title :
VLSI implementation of very-high-order FIR filters
Author :
Soderstrand, Michael A. ; Al-Marayati, Kamal
Author_Institution :
Dept. of Electr. & Comput. Eng., California Univ., Davis, CA, USA
fDate :
30 Apr-3 May 1995
Abstract :
Very-high-order FIR filters required for the new modulation schemes associated with wireless computer networks and cellular telephones can be implemented in VLSI circuitry using low-power CMOS technology and a novel application of Residue Number System (RNS) arithmetic. Through this approach 20-bit equivalent integer arithmetic can be obtained for filters with 8 to 256 taps with only a modest increase in hardware for filters above 8 taps. Simulations indicate that this new technique can increase dramatically the number of taps implemented on a single VLSI chip when compared with an FIR filter generated using FIRGEN
Keywords :
CMOS digital integrated circuits; FIR filters; VLSI; delay circuits; quadrature phase shift keying; residue number systems; 0.8 mum; 20-bit equivalent integer arithmetic; FQPSK-KF modulation scheme; VLSI implementation; cellular telephones; linear phase filter; low-power CMOS technology; modulation schemes; residue number system arithmetic; tap implementation; very-high-order FIR filters; wireless computer networks; Application software; CMOS technology; Cellular networks; Circuits; Computer networks; Digital arithmetic; Finite impulse response filter; Hardware; Telephony; Very large scale integration;
Conference_Titel :
Circuits and Systems, 1995. ISCAS '95., 1995 IEEE International Symposium on
Conference_Location :
Seattle, WA
Print_ISBN :
0-7803-2570-2
DOI :
10.1109/ISCAS.1995.521403
