Detection of control flow errors using signature and checking instructions

Author

Sosnowski, Janusz

Author_Institution

Inst. of Comput. Sci., Warsaw Tech. Univ., Poland

fYear

1988

fDate

12-14 Sep 1988

Firstpage

81

Lastpage

88

Abstract

An approach is presented to the online detection of control flow errors caused by transient and intermittent faults in microprocessor systems. It is based on the idea of signatured instruction streams. Signatures are embedded into the program memory using the monitored processor instructions. Compared with existing techniques, the presented approach is universal and can be easily implemented using off-the-shelf programmable array logic and LCA circuits. The hardware overhead ranges from one to several chips for microprocessors with 8-bit and 16-bit data buses. Program memory overhead is 10-20% and quite often no extra memory chip is required. A special software module has been developed to embed signatures and checkpoints into application programs

Keywords

automatic testing; fault location; integrated circuit testing; integrated logic circuits; logic testing; microprocessor chips; 16 bit; 8 bit; IC testing; LCA circuits; checking instructions; computer testing; control flow errors; intermittent faults; microprocessor chips; microprocessor systems; off-the-shelf programmable array logic; online detection; program memory overhead; signatured instruction streams; software module; transient faults; Circuit faults; Control systems; Data buses; Error correction; Fault detection; Hardware; Logic circuits; Microprocessors; Monitoring; Programmable logic arrays;

fLanguage

English

Publisher

ieee

Conference_Titel

Test Conference, 1988. Proceedings. New Frontiers in Testing, International

Conference_Location

Washington, DC

ISSN

1089-3539

Print_ISBN

0-8186-0870-6

Type

conf

DOI

10.1109/TEST.1988.207783

Filename

207783