Packaging technologies for 500-MHz VLSI test system ULTIMATE

Author

Sakagawa, Yoshimitsu ; Akazawa, Yukio ; Narumi, Naoaki ; Yoshii, Akira ; Sudo, Tsuneta

Author_Institution

LSI Lab., NTT, Kanagawa, Japan

fYear

1988

fDate

12-14 Sep 1988

Firstpage

120

Lastpage

125

Abstract

The prototype VLSI test system ULTIMATE has a 1024-pin capability at 500-MHz test rate and a timing accuracy of ±50 ps. A novel packaging method improves signal quality, heat removal, and cost. ULTIMATE´s compact water cooled frame and thermal conduction elements enable 10001 W/L power consumption at a packing density of 270 chips/L

Keywords

VLSI; automatic testing; integrated circuit testing; packaging; 500 MHz; IC testing; ULTIMATE; VLSI test system; automatic testing; cost; heat removal; packaging; signal quality; thermal conduction elements; water cooled frame; Accuracy; Costs; Electronics cooling; Laboratories; Large scale integration; Packaging; Space heating; System testing; Timing; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Test Conference, 1988. Proceedings. New Frontiers in Testing, International

Conference_Location

Washington, DC

ISSN

1089-3539

Print_ISBN

0-8186-0870-6

Type

conf

DOI

10.1109/TEST.1988.207789

Filename

207789

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3110503