• DocumentCode
    3111080
  • Title

    Identification of failing tests with cycling registers

  • Author

    Savir, J. ; McAnney, W.H.

  • Author_Institution
    IBM, Poughkeepsie, NY, USA
  • fYear
    1988
  • fDate
    12-14 Sep 1988
  • Firstpage
    322
  • Lastpage
    328
  • Abstract
    A method is presented of operating on signatures from a cycling register such that the complexity of identifying multiple failing tests is comparable to that of identifying a single failing test. The method has some interesting aliasing characteristics. The authors show the probability of aliasing and suggest how it can be kept relatively small. The efficiency of the method decreases as the number of failing tests increase. The reduction in efficiency is due to an increase in aliasing probability caused by footprints being lost in the cycling registers. The larger the number of failing tests, the greater is the chance that aliasing will occur
  • Keywords
    fault location; integrated logic circuits; logic testing; probability; shift registers; aliasing characteristics; cycling registers; efficiency; footprints; multiple failing tests; probability; signatures; Circuit testing; Clocks; Data systems; Equations; Failure analysis; Feedback; Latches; Master-slave; Pattern analysis; Shift registers;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Test Conference, 1988. Proceedings. New Frontiers in Testing, International
  • Conference_Location
    Washington, DC
  • ISSN
    1089-3539
  • Print_ISBN
    0-8186-0870-6
  • Type

    conf

  • DOI
    10.1109/TEST.1988.207818
  • Filename
    207818