Title :
Evaluating the limitations of high-speed board testers
Author_Institution :
Teradyne Inc., Boston, MA, USA
Abstract :
The factors which limit both in-circuit and functional test system performance are discussed, and techniques that can be used to minimize their effects are suggested. Two simple models are developed to calculate actual test performance, or to compare different tester models against a hypothetical board design
Keywords :
printed circuit testing; functional test system; high-speed board testers; in-circuit testing; models; Clocks; Detectors; Fault detection; Logic testing; Physics; Programming profession; Stress; System performance; System testing; Timing;
Conference_Titel :
Test Conference, 1988. Proceedings. New Frontiers in Testing, International
Conference_Location :
Washington, DC
Print_ISBN :
0-8186-0870-6
DOI :
10.1109/TEST.1988.207828
