A 50-GS/s 5-b ADC in 0.18-µm SiGe BiCMOS

Author

Lee, Jaesik ; Chen, Young-Kai

Author_Institution

Alcatel-Lucent, Murray Hill, NJ, USA

fYear

2010

fDate

23-28 May 2010

Firstpage

900

Lastpage

903

Abstract

A 5-b 50-GS/s time-interleaved ADC is presented in 0.18-μm SiGe BiCMOS. The two-channel interleaved flash architecture is used to increase the conversion rate. The front-end three-stage distributed track-and-hold amplifier is devised to improve the dynamic performance. The ADC features SNDR as high as 23.1 dB with 20 GHz sine wave input at 50 GS/s conversion rate, and the third harmonic distortion is -36.5 dBc. It shows the measured resolution bandwidth of 18 GHz and the FOM of 9 pJ per conversion step with power consumption of 5.4 W.

Keywords

BiCMOS integrated circuits; Ge-Si alloys; amplifiers; analogue-digital conversion; harmonic distortion; semiconductor materials; BiCMOS; SiGe; frequency 18 GHz; frequency 20 GHz; front-end three-stage distributed track-and-hold amplifier; harmonic distortion; power 5.4 W; size 0.18 mum; time-interleaved ADC; two-channel interleaved flash architecture; Bandwidth; BiCMOS integrated circuits; Clocks; Distributed amplifiers; Distributed parameter circuits; Germanium silicon alloys; Millimeter wave technology; Optical receivers; Silicon germanium; Switches; Analog-to-digital converter; distributed trackand-hold amplifier; interleaved flash; millimeter-wave radio; optical transmission receiver;

fLanguage

English

Publisher

ieee

Conference_Titel

Microwave Symposium Digest (MTT), 2010 IEEE MTT-S International

Conference_Location

Anaheim, CA

ISSN

0149-645X

Print_ISBN

978-1-4244-6056-4

Electronic_ISBN

0149-645X

Type

conf

DOI

10.1109/MWSYM.2010.5515985

Filename

5515985