• DocumentCode
    3111533
  • Title

    D3FS: a demand driven deductive fault simulator

  • Author

    Smith, Steven P. ; Mercer, M. Ray ; Underwood, Bill

  • Author_Institution
    Microelectron. & Comput. Technol. Corp., Austin, TX, USA
  • fYear
    1988
  • fDate
    12-14 Sep 1988
  • Firstpage
    582
  • Lastpage
    592
  • Abstract
    A high-speed fault simulator is presented that combines demand-driven simulation techniques with a bit-encoded deductive fault simulation scheme. The simulator uses an efficient approach to the management of signal value and fault list structures intended to minimize disk thrashing during execution. Input cone analysis is used during preprocessing to identify gates with independent inputs so that optimized evaluation routines that include early cutoff can be used. Results are given for the demand-driven deductive fault simulator and contrasted with an earlier demand-driven parallel fault simulator
  • Keywords
    automatic test equipment; automatic testing; digital simulation; electronic engineering computing; fault location; logic testing; ATE; automatic testing; bit-encoded deductive fault simulation; demand driven deductive fault simulator; disk thrashing; fault list structures; high-speed fault simulator; logic testing; preprocessing; Automatic test pattern generation; Automatic testing; Circuit faults; Circuit simulation; Circuit testing; Computational modeling; Computer simulation; Microelectronics; Sequential analysis; Vectors;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Test Conference, 1988. Proceedings. New Frontiers in Testing, International
  • Conference_Location
    Washington, DC
  • ISSN
    1089-3539
  • Print_ISBN
    0-8186-0870-6
  • Type

    conf

  • DOI
    10.1109/TEST.1988.207840
  • Filename
    207840
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3111533