DocumentCode
3111689
Title
Built-in test compiler in an ASIC environment
Author
Archambeau, Eric ; Egmond, Ken Van
Author_Institution
VLSI Technol. Inc., San Jose, CA, USA
fYear
1988
fDate
12-14 Sep 1988
Firstpage
657
Lastpage
664
Abstract
A built-in test (BIT) block compiler integrated into a set of design tools is described. One module of the BIT compiler generates both a structural description and a behavioral simulation model for pseudorandom pattern generators and signature analyzers, based on a linear feedback shift register technique. The details of this module and a technique for merging the built-in test into a complete ASIC test program are shown
Keywords
VLSI; application specific integrated circuits; circuit CAD; digital simulation; logic CAD; modules; program compilers; shift registers; ASIC environment; ASIC test program; BIT compiler; behavioral simulation model; block compiler; built-in test; design tools; linear feedback shift register; pseudorandom pattern generators; signature analyzers; Application specific integrated circuits; Built-in self-test; Circuit testing; Design engineering; Linear feedback shift registers; Merging; Pattern analysis; Software libraries; Test pattern generators; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Conference, 1988. Proceedings. New Frontiers in Testing, International
Conference_Location
Washington, DC
ISSN
1089-3539
Print_ISBN
0-8186-0870-6
Type
conf
DOI
10.1109/TEST.1988.207849
Filename
207849
Link To Document