• DocumentCode
    3111944
  • Title

    Integrated test logic for video IC´s

  • Author

    Beck, John ; Rose, Robert ; Pappas, James ; Seiler, Larry

  • Author_Institution
    Digital Equipment Corp., Hudson, MA, USA
  • fYear
    1988
  • fDate
    12-14 Sep 1988
  • Firstpage
    744
  • Lastpage
    751
  • Abstract
    A well-integrated chip-to-system design for test strategy and its implementation in a set of custom VLSI video chips are discussed. It supports both chip- and board-level testing of digital and analog circuits within the video subsystem. This test strategy permits testing of critical nodes inside the custom chips, making possible many tests that could not be performed with external test logic. The test coverage achieved eliminates the need for a bed-of-nails module tester. Test generation is very simple and test time is reduced by several orders of magnitude over previously used test methods. The method is cost effective, adding only 5% to the area of each chip
  • Keywords
    VLSI; application specific integrated circuits; integrated circuit testing; logic testing; printed circuit testing; ASIC; IC testing; PC testing; critical nodes; custom VLSI video chips; custom chips; video subsystem; Circuit testing; Costs; Graphics; Integrated circuit testing; Logic testing; Monitoring; Multiplexing; Performance evaluation; Registers; Videoconference;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Test Conference, 1988. Proceedings. New Frontiers in Testing, International
  • Conference_Location
    Washington, DC
  • ISSN
    1089-3539
  • Print_ISBN
    0-8186-0870-6
  • Type

    conf

  • DOI
    10.1109/TEST.1988.207860
  • Filename
    207860