Title :
FEOL technologies for fabricating high performance logic and system LSI of 100 nm node
Author :
Kase, Masataka ; Okabe, Ken-ichi ; Kubo, Tomohiro ; Saitoh, Masanori ; Tamura, Naoyoshi ; Mori, Haruhisa
Author_Institution :
Dept. of Process Manuf., Fujitsu Ltd., Mie, Japan
Abstract :
This paper reviews the FEOL technologies for fabricating the transistor for high performance logic and system LSI devices of 100 nm node, especially, doping process, gate dielectric formation and shallow junction formation using spike annealing. The optimization of ion implantation for gate doping contact source drain, and gate oxide, spike annealing are described
Keywords :
DRAM chips; MOSFET; annealing; dielectric thin films; integrated logic circuits; ion implantation; large scale integration; oxidation; reviews; semiconductor doping; semiconductor junctions; 100 nm; DRAM; FEOL technologies; MOSFET; contact source drain; doping process; front end of line technology; gate dielectric formation; gate doping; gate oxide; high performance logic LSI; ion implantation; optimization; review; shallow junction formation; spike annealing; system LSI; transistor; Annealing; Doping; Implants; Insulation; Ion implantation; Large scale integration; Logic devices; Manufacturing processes; Paper technology; Silicon;
Conference_Titel :
Ion Implantation Technology, 2000. Conference on
Conference_Location :
Alpbach
Print_ISBN :
0-7803-6462-7
DOI :
10.1109/.2000.924098
