Title :
Study of laser thermal processing (LTP) to meet sub 130 nm node shallow junction requirements
Author :
Talwar, Somit ; Felch, Susan ; Downey, Dan ; Wang, Yun
Author_Institution :
Verdant Technol., San Jose, CA, USA
Abstract :
The 1999 ITRS roadmap places severe requirements on the source drain extensions. It wrongly suggests that no solutions exist for concurrently meeting the junction depth, sheet resistance and lateral abruptness requirements starting from the 130 nm node. Laser thermal processing (LTP) is a possible solution that is being investigated to meet the stringent roadmap requirements. At IIT ´98, results of implant activation using laser thermal processing (LTP) were presented. Junctions with extremely low sheet resistance (73 Ohms/sq) for sub 30 nm depths were demonstrated. In this work, a study of the extendibility of the LTP approach to meet sub 130 nm node requirements has been undertaken. Sheet resistance, junction depth and vertical abruptness (which is used to infer lateral abruptness) of LTP junctions are measured for a range of junctions. It is shown that the sheet resistance and junction depth requirements can easily be met down to the 50 nm node using LTP. Further, it is observed that the vertical abruptness of the LTP junctions is SIMS limited and is better than 2 nm/decade. This meets the 100 nm node requirements
Keywords :
boron; elemental semiconductors; laser beam annealing; secondary ion mass spectra; semiconductor junctions; silicon; SIMS; Si:B; implant activation; junction depth; laser thermal processing; lateral abruptness; shallow junction; sheet resistance; source drain extensions; vertical abruptness; Amorphous materials; Annealing; Atom lasers; Atomic beams; Implants; Optical pulses; Rapid thermal processing; Semiconductor lasers; Silicon; Surface resistance;
Conference_Titel :
Ion Implantation Technology, 2000. Conference on
Conference_Location :
Alpbach
Print_ISBN :
0-7803-6462-7
DOI :
10.1109/.2000.924118