Efficient critical area estimation for arbitrary defect shapes

Author

Allan, Gerard A. ; Walton, Anthony J.

Author_Institution

Dept. of Electr. Eng., Edinburgh Univ., UK

fYear

1997

fDate

20-22 Oct 1997

Firstpage

20

Lastpage

28

Abstract

The paper reports an efficient method of estimating extra and missing material critical areas for arbitrary defect shapes. The method is applied to the generation of approximated circular, elliptical, rod and arbitrary shaped defects. The algorithms have been implemented within the Edinburgh Yield Estimator (EYE) allowing critical areas to be generated interactively within the Cadence layout editor and also within the EYES (EYE-Sampling) tool, enabling critical area estimation of state-of-the-art ICs. Results based on the analysis of IC layout suggest that circular defect models can give inaccurate yield predictions where non-circular defects are a source of faults

Keywords

VLSI; circuit layout CAD; integrated circuit layout; integrated circuit yield; semiconductor process modelling; Cadence layout editor; EYE; EYE-sampling tool; EYES; Edinburgh Yield Estimator; IC layout; arbitrary defect shapes; arbitrary shaped defects; circular defects; critical area estimation; elliptical defects; rod shaped defects; Circuit faults; Data mining; Eyes; Integrated circuit layout; Integrated circuit modeling; Predictive models; Shape; State estimation; Tellurium; Yield estimation;

fLanguage

English

Publisher

ieee

Conference_Titel

Defect and Fault Tolerance in VLSI Systems, 1997. Proceedings., 1997 IEEE International Symposium on

Conference_Location

Paris

ISSN

1550-5774

Print_ISBN

0-8186-8168-3

Type

conf

DOI

10.1109/DFTVS.1997.628305

Filename

628305