Dedicated processor for partial differential equation solver

Author

Theodorou, F. ; Gaffiot, F. ; Boutherin, B. ; Menezia, R. ; Le Helley, M.

Author_Institution

LEAME, Ecole Centrale de Lyon, France

fYear

1990

fDate

29 May-1 Jun 1990

Firstpage

244

Lastpage

247

Abstract

A hardware solver for ΔΨ=f(Ψ), by the finite-difference method in 3D is presented. The general architecture is given: several identical processors run in a parallel mode in a PC-type environment. Each processor is a specific circuit (ASIC). The arithmetic unit has been integrated in a CMOS 2 μm technology. Using this circuit to simulate potential distribution in silicon devices shows a drastic reduction of the computation time, 1.7 μs per discretization node against 900 μs by a software approach

Keywords

CMOS integrated circuits; application specific integrated circuits; mathematics computing; microprocessor chips; parallel architectures; partial differential equations; special purpose computers; 2 micron; ASIC; PC-type environment; architecture; arithmetic unit; dedicated processor; finite-difference method; parallel mode; partial differential equation solver; Application specific integrated circuits; Arithmetic; CMOS technology; Circuit simulation; Computational modeling; Computer architecture; Finite difference methods; Hardware; Integrated circuit technology; Partial differential equations;

fLanguage

English

Publisher

ieee

Conference_Titel

Euro ASIC '90

Conference_Location

Paris

Print_ISBN

0-8186-2066-8

Type

conf

DOI

10.1109/EASIC.1990.207948

Filename

207948