Crosstalk minimization in three-layer HVH channel routing

Author

Chen, Zhan ; Koren, Israel

Author_Institution

Dept. of Electr. & Comput. Eng., Massachusetts Univ., Amherst, MA, USA

fYear

1997

fDate

20-22 Oct 1997

Firstpage

38

Lastpage

42

Abstract

Crosstalk has become a major issue in VLSI design due to the high frequency, long interconnecting lines and small spacing between interconnects in today´s integrated circuits. In this paper, we study the problem of crosstalk minimization in 3-layer HVH channel routing. A heuristic algorithm that combines layer reassignment and track reassignment is presented. This algorithm can iteratively modify the layout so that the crosstalk in the channel is minimized. Experimental results show that the proposed approach can reduce the crosstalk by an average of 16.4% on a set of benchmark examples

Keywords

VLSI; circuit layout CAD; crosstalk; integrated circuit layout; minimisation; network routing; VLSI design; crosstalk minimization; heuristic algorithm; integrated circuits; interconnecting lines; layer reassignment; layout; three-layer HVH channel routing; track reassignment; Crosstalk; Frequency; Heuristic algorithms; Integrated circuit interconnections; Integrated circuit noise; Iterative algorithms; Minimization; Routing; Very large scale integration; Wire;

fLanguage

English

Publisher

ieee

Conference_Titel

Defect and Fault Tolerance in VLSI Systems, 1997. Proceedings., 1997 IEEE International Symposium on

Conference_Location

Paris

ISSN

1550-5774

Print_ISBN

0-8186-8168-3

Type

conf

DOI

10.1109/DFTVS.1997.628307

Filename

628307