Title :
Transparent-refresh DRAM (TReD) using dual-port DRAM cell
Author :
Sakurai, Takayasu ; Nogami, Kazutaka ; Sawada, Kazuhiro ; Iizuka, Tetsuya
Author_Institution :
Toshiba Corp., Kawasaki, Japan
Abstract :
A novel memory circuit, the transparent-refresh DRAM (TReD), is proposed to make a dynamic random-access memory (DRAM) virtually refresh-free, and a test device is successfully fabricated. The TReD uses dual-port dynamic RAM cells, one port of which is assigned for a refresh operation and the other port is assigned for a normal read/write operation. Using the configuration, users of the RAM are freed from a cumbersome refresh control without access-time degradation. The TReD cell size is about 1/2.5 of a 4-transistor SRAM (static RAM) cell, so that it can provide very-high-density RAM macros, which is functionally static. As a dual-port memory, the proposed dual-port DRAM cell size is 1/5 of the dual-port SRAM cell, and is suitable for large-scale dual-port memory macros in ASIC (application-specific integrated circuit) environments
Keywords :
VLSI; cellular arrays; integrated memory circuits; random-access storage; ASIC; access-time degradation; dual-port DRAM cell; large-scale dual-port memory macros; read/write operation; refresh operation; transparent-refresh DRAM; very-high-density RAM macros; Application specific integrated circuits; Circuit testing; Control systems; DRAM chips; Laboratories; Large-scale systems; Random access memory; Read-write memory; Semiconductor device testing; Semiconductor devices;
Conference_Titel :
Custom Integrated Circuits Conference, 1988., Proceedings of the IEEE 1988
Conference_Location :
Rochester, NY
DOI :
10.1109/CICC.1988.20796