• DocumentCode
    3114124
  • Title

    Comparison between a chip for realtime skeleting of images and its corresponding discrete realisation-a case study

  • Author

    Maeder, J. ; Rauscher, R.H.

  • Author_Institution
    Dept. of Comput. Sci., Hamburg Univ., Germany
  • fYear
    1990
  • fDate
    29 May-1 Jun 1990
  • Firstpage
    382
  • Lastpage
    385
  • Abstract
    A chip and a corresponding PCB solution performing the special task of thinning is presented. Thinning, a common task in the field of image processing, preserves the overall structure of the image while making lines thinner and pixel spots smaller. While thinning (skeleting) is only available on special image processing architectures in realtime or has been implemented in `slow´ software, both solutions presented solutions make thinning (at realtime conditions) available for general purpose environments. This paper describes both realisations, based on the same architectural concept, and shows how to integrate into an image processing pipeline. This proceeding enables an objective comparison. At last the results, the chip-layout, and new ideas concerning testability aspects are presented
  • Keywords
    computerised picture processing; digital signal processing chips; pipeline processing; chip-layout; discrete realisation; image processing architectures; image processing pipeline; pixel spots; realtime skeleting; testability aspects; thinning; Computer aided software engineering; Computer science; Fingerprint recognition; Hardware; Image processing; Parallel processing; Pattern recognition; Pipeline processing; Pixel; Target recognition;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Euro ASIC '90
  • Conference_Location
    Paris
  • Print_ISBN
    0-8186-2066-8
  • Type

    conf

  • DOI
    10.1109/EASIC.1990.207973
  • Filename
    207973