High-frequency oscillations n high-pin-count ECL devices

Examines high-frequency oscillations experimentally observed in high-pin-count ECL ASIC (emitter-coupled-logic application-specific integrated-circuit) devices on high-speed testers. A special test chip was designed to determine experimentally the conditions that create such oscillations. Analytical studies agree closely with the experimental results. Design guidelines are established for the ECL chips and packages to use them, as well as means to eliminate oscillation on the tester. Results confirm that stable operation of the ECL chips can be maintained without speed limitations, as long as certain conditions are met by chip and package designers