DocumentCode
3114722
Title
A Framework for Automated Testing of RTL Designs
Author
Patil, Aniket ; Proeller, Markus ; Kshirasagar, Ashwin ; Nahar, Amit
Author_Institution
Ifm Eng. Private Ltd., Pune, India
fYear
2015
fDate
26-27 Feb. 2015
Firstpage
989
Lastpage
991
Abstract
This paper describes a novel testing framework for RTL Designs. The framework emphasizes effectiveness of automated black box testing of RTL Designs. The proposed test framework requires minimum human intervention and test cases can be executed with a single click. For extensively generic based testbench, our test framework can be made highly configurable. We can easily integrate any RTL design and its testbench in the proposed test framework. The crux of the proposed test framework is a Python script which interacts with the design entry tool and simulator to execute the testcases as per the configuration. The examples illustrated in this paper use HDL Designer as a design entry tool and Model Sim as a simulator. The paper then details design and implementation of a fully automated testbench. Successful results obtained by using this framework for two industrial projects are elaborated. This test framework also includes metrics to estimate the comprehensive code coverage.
Keywords
field programmable gate arrays; logic design; logic testing; FPGAs; HDL designer; Model Sim; Python script; RTL designs; automated black box testing; design entry tool; generic based testbench; industrial projects; Computational modeling; Field programmable gate arrays; Hardware design languages; Integrated circuit modeling; Measurement; Testing; XML; Python; RTL Designs; automated; behavioral simulation; testbench;
fLanguage
English
Publisher
ieee
Conference_Titel
Computing Communication Control and Automation (ICCUBEA), 2015 International Conference on
Conference_Location
Pune
Type
conf
DOI
10.1109/ICCUBEA.2015.195
Filename
7155994
Link To Document