Title :
Compositional Verification for Hierarchical Scheduling of Real-Time Systems
Author :
Carnevali, Laura ; Pinzuti, A. ; Vicario, Enrico
Author_Institution :
Dept. of Inf. Eng., Univ. of Florence, Florence, Italy
Abstract :
Hierarchical Scheduling (HS) techniques achieve resource partitioning among a set of real-time applications, providing reduction of complexity, confinement of failure modes, and temporal isolation among system applications. This facilitates compositional analysis for architectural verification and plays a crucial role in all industrial areas where high-performance microprocessors allow growing integration of multiple applications on a single platform. We propose a compositional approach to formal specification and schedulability analysis of real-time applications running under a Time Division Multiplexing (TDM) global scheduler and preemptive Fixed Priority (FP) local schedulers, according to the ARINC-653 standard. As a characterizing trait, each application is made of periodic, sporadic, and jittering tasks with offsets, jitters, and nondeterministic execution times, encompassing intra-application synchronizations through semaphores and mailboxes and interapplication communications among periodic tasks through message passing. The approach leverages the assumption of a TDM partitioning to enable compositional design and analysis based on the model of preemptive Time Petri Nets (pTPNs), which is expressly extended with a concept of Required Interface (RI) that specifies the embedding environment of an application through sequencing and timing constraints. This enables exact verification of intra-application constraints and approximate but safe verification of interapplication constraints. Experimentation illustrates results and validates their applicability on two challenging workloads in the field of safety-critical avionic systems.
Keywords :
Petri nets; aerospace computing; formal verification; message passing; microprocessor chips; resource allocation; safety-critical software; scheduling; ARINC-653 standard; FP local scheduler; HS technique; RI concept; TDM global scheduler; architectural verification; compositional analysis; compositional design; compositional verification; formal specification; hierarchical scheduling; high-performance microprocessor; interapplication communication; intra-application synchronization; jittering task; mailbox; message passing; nondeterministic execution time; periodic task; preemptive fixed priority local scheduler; preemptive time Petri nets model; realtime system; required interface concept; resource partitioning; safety-critical avionic system; schedulability analysis; semaphore; sequencing constraint; sporadic task; time division multiplexing; timing constraint; Complexity theory; Job shop scheduling; Petri nets; Real time systems; Resource management; Time division multiplexing; Timing; ARINC-653; Real-time systems; compositional verification; hierarchical scheduling; preemptive fixed priority; preemptive time Petri nets; symbolic state-space analysis; time division multiplexing;
Journal_Title :
Software Engineering, IEEE Transactions on
DOI :
10.1109/TSE.2012.54