Title :
Characterization of charging damage in high power implants using SPIDER wafers
Author :
Singh, Bhanu ; Elkind, Alexander ; Mack, Michael ; Ameen, Michael ; Marshall, David ; Ring, Phil ; Krull, Wade
Author_Institution :
Motorola Inc., Chandler, AZ, USA
Abstract :
A detailed investigation of charging induced damage due to high power implants was done using SEMATECH SPIDER wafers with sub-50 Å gate oxide thickness. The SPIDER wafers have an active area to gate antenna ratio of up to 1:90 K, which enables a high sensitivity for charging related damage, Threshold voltage (Vt) and gate leakage current (Ig) shifts for both n- and p-type devices have been examined as a response to plasma electron flood (PEF) conditions. Results from 180 keV As+ and P+ implants at 20 mA and 5×1015/cm2 dose are presented. The impact of PEF settings on n-mos and p-mos devices is shown, and correlated to both in situ charge monitors and CHARM wafers. This work underscores the importance of characterizing PEF operation to obtain optimum charge control
Keywords :
MOSFET; arsenic; electron-surface impact; ion implantation; leakage currents; phosphorus; plasma materials processing; process control; semiconductor device measurement; semiconductor device testing; semiconductor doping; surface charging; 180 keV; 20 mA; 50 A; As+ implants; CHARM wafers; P+ implants; SEMATECH SPIDER wafers; SPIDER wafers; charging damage; charging induced damage; gate antenna ratio; gate leakage current; gate oxide; high power implants; high sensitivity; n-mos devices; n-type devices; optimum charge control; p-mos devices; p-type devices; plasma electron flood conditions; threshold voltage; CMOS technology; Electrodes; Electrons; Floods; Implants; Leakage current; MOSFETs; Plasma density; Plasma temperature; Threshold voltage;
Conference_Titel :
Ion Implantation Technology, 2000. Conference on
Conference_Location :
Alpbach
Print_ISBN :
0-7803-6462-7
DOI :
10.1109/.2000.924214
