All-digital comparator using device-ratio programmable triggering levels

A novel digital comparator topology is presented. Using transistors´ ratio, a new fixed comparison level that can be programmed is introduced. An all-digital flash A/D converter is built using the proposed comparator topology. Building an N-bit flash A/D converter using the proposed M-bit digital A/D converters reduces the needed power and area by a factor of 2^M; as compared to old topologies. It is shown that a 9-bit resolution flash A/D converter, built using 2-bit digital A/D converters, needs only the area and power of a 7-bit A/D converter that is constructed using old comparator topologies. Further reduction can be achieved if a 4-bit digital A/D converter is used to build the 9-bit flash A/D converter, where the required power and area are divided by 16.