DocumentCode :
3116185
Title :
Slow-switching-limit loss removal in SC DC-DC converters using adiabatic charging
Author :
Salem, Loai ; Ismail, Yehea
Author_Institution :
Nano-Electron. Integrated Syst. Center (NISC), Northwestern Univ./Nile Univ., Cairo, Egypt
fYear :
2011
fDate :
Nov. 30 2011-Dec. 2 2011
Firstpage :
1
Lastpage :
4
Abstract :
A novel technique to remove the slow-switching-limit (SSL) loss in switched-capacitor (SC) dc-dc converters is presented. A small series inductor is cascaded with an SC converter causing adiabatic charging of the converter´s energy-transfer capacitors. In this work, the theory and necessary conditions for SSL loss elimination through an inductive output filter are derived. The new topology enables high efficiency for on-die dc-dc converters while maintaining reasonable energy density. A 2:1 SC converter is built in 65-nm CMOS process to validate the analysis methods and asses the proposed technique. The proposed adiabatic charging enhances the SC efficiency by 3.3 % with only 13 % area overhead, which otherwise requires doubling the capacitor area.
Keywords :
CMOS integrated circuits; DC-DC power convertors; switched capacitor filters; CMOS process; adiabatic charging; dc-dc converters; energy-transfer capacitors; inductive output filter; series inductor; slow-switching-limit loss removal; switched-capacitor; Capacitors; Impedance; Inductors; Q factor; Resonant frequency; Switches; Switching frequency;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Energy Aware Computing (ICEAC), 2011 International Conference on
Conference_Location :
Istanbul
Print_ISBN :
978-1-4673-0466-5
Electronic_ISBN :
978-1-4673-0464-1
Type :
conf
DOI :
10.1109/ICEAC.2011.6136700
Filename :
6136700
Link To Document :
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