DocumentCode
3116229
Title
Linear microcircuit fault modeling and detection
Author
Epstein, B.R. ; Miller, S.R. ; Czigler, M.H. ; Gray, D.R.
Author_Institution
David Sarnoff Res. Center, Princeton, NJ, USA
fYear
1991
fDate
15-17 April 1991
Firstpage
59
Lastpage
61
Abstract
Classical discrimination analysis and neural network techniques are used to detect and classify possible faults in linear microcircuits. The success rates of simulated fault detection and classification are described for various types of analog and mixed-mode circuits.<>
Keywords
analogue circuits; application specific integrated circuits; fault location; integrated circuit testing; linear integrated circuits; neural nets; analogue circuits; discrimination analysis; linear microcircuits; mixed-mode circuits; neural network techniques; simulated fault detection; Circuit faults; Circuit simulation; Circuit testing; Electrical fault detection; Fault detection; Fault diagnosis; Neural networks; Performance analysis; Statistical analysis; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Test Symposium, 1991. 'Chip-to-System Test Concerns for the 90's', Digest of Papers
Conference_Location
Atlantic City, NJ, USA
Type
conf
DOI
10.1109/VTEST.1991.208133
Filename
208133
Link To Document