DocumentCode :
3116358
Title :
Interconnect verification of multichip modules using boundary scan
Author :
Karpenske, D.S.
Author_Institution :
Schlumberger Technol., San Jose, CA, USA
fYear :
1991
fDate :
15-17 April 1991
Firstpage :
85
Lastpage :
91
Abstract :
Certainly one of the key factors in the manufacture of multichip modules (MCM) is the verification and fault diagnosis of an MCM´s structural interconnects. High performance MCM products, which are clearly an expensive technology, will incur additional costs unless appropriate diagnostic tools are made available for fast failure analysis during production test. Boundary scan implementation is key in making these tools feasible.<>
Keywords :
fault location; hybrid integrated circuits; integrated circuit testing; production testing; MCM products; boundary scan; diagnostic tools; failure analysis; fault diagnosis; multichip modules; production test; structural interconnects; verification; Assembly; CMOS technology; Costs; Geometry; Integrated circuit testing; Manufacturing; Multichip modules; Probes; Production; Test pattern generators;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Test Symposium, 1991. 'Chip-to-System Test Concerns for the 90's', Digest of Papers
Conference_Location :
Atlantic City, NJ, USA
Type :
conf
DOI :
10.1109/VTEST.1991.208138
Filename :
208138
Link To Document :
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