DocumentCode :
3116645
Title :
An approach for designing self-checking logic using residue codes
Author :
Lala, P.K. ; Busaba, F. ; Yarlagadda, K.C.
Author_Institution :
Dept. of Electr. Eng., North Carolina A&T State Univ., Greensboro, NC, USA
fYear :
1991
fDate :
15-17 April 1991
Firstpage :
166
Lastpage :
171
Abstract :
It is generally agreed now that the major portion of faults in logic system are not of permanent nature. Current testing strategies are incapable of detecting nonpermanent faults. The characteristics of such faults requires that logic circuits be designed in a way so that if there is a fault in the circuit, its effect will be detected during the normal operation of the circuit, i.e. the circuits be self-checking. In this paper the authors propose two rules based on the mode 3 residue coding scheme for designing circuits for online error detection.<>
Keywords :
automatic testing; error detection codes; logic design; logic testing; mode 3 residue coding scheme; nonpermanent faults; online error detection; residue codes; self-checking logic; Arithmetic; Automatic testing; Circuit faults; Circuit testing; Combinational circuits; Costs; Electrical fault detection; Fault detection; Logic circuits; Logic design;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Test Symposium, 1991. 'Chip-to-System Test Concerns for the 90's', Digest of Papers
Conference_Location :
Atlantic City, NJ, USA
Type :
conf
DOI :
10.1109/VTEST.1991.208153
Filename :
208153
Link To Document :
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