Title :
Comparison of floorplanning algorithms for full custom ICs
Author :
Cai, H. ; Hegge, J.J.A.
Author_Institution :
Dept. of Electr. Eng., Delft Univ. of Technol., Netherlands
Abstract :
Four floorplanning algorithms for full-custom ICs are compared. They are the min-cut algorithm, the force-directed algorithm, simulated annealing, and the sequence heuristic. Experimental results are shown. The discussion is restricted to the class of floorplans with a slicing structure. Experimental results are shown
Keywords :
VLSI; circuit layout CAD; CAD; VLSI; circuit layout design; floorplanning algorithms; force-directed algorithm; full custom ICs; min-cut algorithm; sequence heuristic; simulated annealing; slicing structure; Algorithm design and analysis; Analytical models; Circuit simulation; Clustering algorithms; Merging; Network theory (graphs); Partitioning algorithms; Shape; Simulated annealing; Very large scale integration;
Conference_Titel :
Custom Integrated Circuits Conference, 1988., Proceedings of the IEEE 1988
Conference_Location :
Rochester, NY
DOI :
10.1109/CICC.1988.20816
