Analysis of avalanche multiplication and breakdown in GaInP/GaAs composite double heterojunction bipolar transistors

A theoretical study of the electron multiplication in composite collector double heterojunction bipolar transistors (DHBTs) is carried out using an avalanche multiplication model with and without dead space effects. Dead space is the minimum distance a carrier must travel to gain sufficient energy from the electric field to cause impact ionization. The simulations show that the onset of multiplication and common emitter breakdown voltage of the composite DHBT decreases with GaAs spacer layer thickness. For a space layer thickness of 30 nm or less, our analysis reveals that the dead space strongly reduces the electron multiplication in the smaller bandgap GaAs layer in composite collector GaInP/GaAs HBTs.