Title :
III-V-semiconductor-on-insulator MISFETs on Si with buried SiO2 and Al2O3 layers by direct wafer bonding
Author :
Yokoyama, Masafumi ; Yasuda, Tetsuji ; Takagi, Hideki ; Urabe, Yuji ; Ishii, Hiroyuki ; Miyata, Noriyuki ; Yamada, Hisashi ; Fukuhara, Noboru ; Hata, Masahiko ; Sugiyama, Masakazu ; Nakano, Yoshiaki ; Takenaka, Mitsuru ; Takagi, Shinichi
Author_Institution :
Univ. of Tokyo, Tokyo, Japan
fDate :
May 31 2010-June 4 2010
Abstract :
We have developed III-V-OI MISFETs on Si with buried SiO2 and Al2O3 layers fabricated by low damage and low temperature direct wafer bonding processes. The III-V-OI MISFETs with both buried SiO2 and Al2O3 layers have demonstrated the high electron mobility of 1200 cm2/Vs. In addition, we found that the buried Al2O3 layers can improve the interface condition between III-V and the buried oxide layers, leading to the higher electron mobility of III-V-OI MISFETs even in the high electric field than that of Si MOSFETs. These high performance transistors will open up the way to the future high performance logic LSI systems.
Keywords :
III-V semiconductors; MISFET; aluminium compounds; silicon compounds; silicon-on-insulator; Al2O3; III-V-semiconductor-on-insulator MISFET; MOSFET; SiO2; buried oxide layers; high electron mobility; logic LSI systems; low temperature direct wafer bonding processes; Aluminum oxide; Electron mobility; Epitaxial growth; III-V semiconductor materials; Indium gallium arsenide; Indium phosphide; MISFETs; MOSFETs; Plasma temperature; Wafer bonding;
Conference_Titel :
Indium Phosphide & Related Materials (IPRM), 2010 International Conference on
Conference_Location :
Kagawa
Print_ISBN :
978-1-4244-5919-3
DOI :
10.1109/ICIPRM.2010.5516261