DocumentCode
3118607
Title
A 17ns 4Mb CMOS DRAM Using Direct Bit-line Sensing Technique
Author
Nagai, T. ; Numata, K. ; Ogihara, M. ; Shimizu, M. ; Imai, K. ; Hara, T. ; Yoshida, M. ; Saito, Y. ; Asao, Y. ; Sawada, S. ; Fujii, S.
Author_Institution
Toshiba Corporation
fYear
1991
fDate
13-15 Feb. 1991
Firstpage
58
Lastpage
290
Keywords
Capacitance; Capacitors; Circuits; Decoding; Flip-flops; Microelectronics; Mirrors; Random access memory; Signal detection; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 1991. Digest of Technical Papers. 38th ISSCC., 1991 IEEE International
Conference_Location
San Francisco, CA, USA
Print_ISBN
0-87942-644-6
Type
conf
DOI
10.1109/ISSCC.1991.689063
Filename
689063
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