DocumentCode
3118608
Title
A reconfigurable 64-tap transversal filter
Author
Stearns, Chip C. ; Luthi, Daniel A. ; Ruetz, Peter A. ; Ang, Peng H.
Author_Institution
LSI Logic Corp., Palo Alto, CA, USA
fYear
1988
fDate
16-19 May 1988
Abstract
A high-speed transversal filter processor with 64 8-bit multiplier accumulators using several innovative custom design techniques has been realized in 14-mm×14-mm silicon at 20-MHz speeds. The processor (L64240) can be configured as a one-dimensional filter for radar or as a two-dimensional filter for real-time image applications. The authors describe the internal architecture of the filter, its key components, and the critical concerns addressing the speed and size of the design
Keywords
computer architecture; computerised picture processing; digital filters; microprocessor chips; radar equipment; signal processing equipment; telecommunications computing; 14 mm; 20 MHz; 8-bit multiplier accumulators; custom design techniques; digital filters; internal architecture; one-dimensional filter; radar; real-time image applications; reconfigurable 64-tap transversal filter; two-dimensional filter; Clocks; Equations; Filtering; Finite impulse response filter; Image processing; Large scale integration; Radar applications; Reconfigurable logic; Silicon; Transversal filters;
fLanguage
English
Publisher
ieee
Conference_Titel
Custom Integrated Circuits Conference, 1988., Proceedings of the IEEE 1988
Conference_Location
Rochester, NY
Type
conf
DOI
10.1109/CICC.1988.20828
Filename
20828
Link To Document