Title :
A CMOS 10 bit accuracy and 5 μS speed AD converter
Author :
Iida, Tetsuya ; Gotoh, Junkei ; Nishizuka, Akihiro ; Hara, Hitoshi
Author_Institution :
Toshiba Semicond. Syst. Eng. Center, Kawasaki, Japan
Abstract :
A novel architecture consisting of successive-approximation A-D (analog-to-digital) conversion has been used to realize a low-cost 10-bit-accuracy A-D converter composed of a small number of components without self-calibration or trimming. A high-speed auto-zeroed comparator has achieved 5-μs A-D conversion. The chip is fabricated by a conventional 2.5-μm CMOS process with a die size of 8.1 mm2
Keywords :
CMOS integrated circuits; analogue-digital conversion; comparators (circuits); 2.5 micron; 5 mus; A/D convertor; high-speed auto-zeroed comparator; CMOS logic circuits; Capacitance; Decoding; Equations; Logic arrays; Logic circuits; MOS capacitors; Switched capacitor circuits; Switching circuits; Voltage;
Conference_Titel :
Custom Integrated Circuits Conference, 1988., Proceedings of the IEEE 1988
Conference_Location :
Rochester, NY
DOI :
10.1109/CICC.1988.20830
